Electronic Design Process Symposium

Integrity Must Be Integral: Daily Life of a SI Guy in EDA

Li-Pen Yuan

Synopsys

slides (in PDF)

Low-Power Analysis Using ORINOCO

Stan Krolikroski

Chip Vision

paper (in PDF)
... and also slides (in PDF)

A Policy-Based Approach to Guiding Low Power Design Methodology

Bhanu Kapoor

Atrenta

paper (in PDF)
... and also slides (in PDF)

PowerTeam:(tm) There is more to Verilog beyond Behavioral Simulation

Mehmet A Cirit

Library Technologies

paper (in PDF)
... and also slides (in PDF)

An Industry-led Platform for Interoperability

Sumit DasGupta

Si2

paper (in PDF)
... and also slides (in PDF)

Using Tcl to Turn EDA Cousins into Sisters

Dwight Hill

Synopsys

slides (in PDF)
... and also paper (in PDF)

Unifying Multiple Tools to Achieve High Performance SoC Design

Mark Bales

Reshape

and

et al.

slides (in PDF)
... and also paper (in PDF)

Interoperability for Whom?

Noel Strader

Synopsys

slides (in PDF)

Building a 21st Century IC Design System on OpenAccess Technology at Hewlett-Packard

Jim Wilmore

HP

slides (in PDF)

Applications of Interoperable Databases and Data Models in Production Flows at LSI Logic

Scott Peterson

LSI Logic

slides (in PDF)

Architecture and Synthesis for Power-Efficient FPGAs [Dinner]

Jason Cong

UCLA

slides (in PDF)

Missing Analog Tools – A Proposal

Steve Grout

paper (in PDF)
... and also slides (in PDF)

Impact of Signal Integrity on System-On-Chip Design Methodologies

Juan-Antonio Carballo

IBM

and

R. Singh @VSIA

paper (in PDF)
... and also slides (in PDF)

ARM SoC Verification Matrix Improves HW/SW Co-Verification

Jason Andrews

Verisity

paper (in PDF)
... and also slides (in PDF)

A Methodology to Remove Unwanted Delays in Outputs and Pre and Post-Synthesis Simulation Mismatches in Implicit State Machines

Shahriyar M. Rizvi

AIUB

and

Jerry Cupal @U. Wyoming

paper (in PDF)
... and also slides (in PDF)

HeatGen: A Vectorless Approach to Switching Activity Generation for IC Power Analysis

Wolfgang Roethig

NEC Electronics

and

V-Cube Technology, et al.

paper (in PDF)
... and also slides (in PDF)

Trends and Challenges in High High-Performance Microprocessor Design [Keynote]

Stefan Rusu

Intel

slides (in PDF)

Beyond P-Cell and Gate-Level Assumptions: Accuracy Requirements for Nanometer Design Simulation

Brian Marshall

Mentor Graphics

paper (in PDF)
... and also slides (in PDF)

A Novel EDA flow for SoC Designs based on Specification Capture, Block-clustering and Bus-partitioning

Ashwin K. Kumaraswamy

University of Edinburgh

and

Agilent Technologies, et al.

paper (in PDF)

Empowering RISC Processors for Speech Coding: Algorithms Using a Portable Coprocessor Architecture

Mehdi Sedighi

Amirkabir University of Technology

and

et al.