Electronic Design Process Symposium

Future Design Systemsfor Large Chips[Keynote]

John Darringer

IBM

slides (in PDF)

The Move To SOC Designs Was A Failure [Keynote]

Greg Spirakis

slides (in PowerPoint format (.ppt))
... and also slides (in PowerPoint format (.ppt))

Designing for 65nm and Beyond: Where’s The Revolution ?!?

Greg Spirakis

slides (in PowerPoint format (.ppt))

A Methodology to Decrease Product Development Time While Increasing Product Quality

John M Acken

Oklahoma State

paper (in PDF)

Milkyway and Bridging to OA

Laurence Brevard

Synopsys

slides (in PDF)

Open HW, Open Design SW, and the VC Ecosystem Dilemma

Juan-Antonio Caballa

IBM

paper (in PDF)

Specification Capture based SoC Modeling

Ashwin K. Kumaraswamy

Univ. of Loughbororough UK

paper (in PDF)

The impact of reuse requirements on IP

Saverio Fazzari

Cadence

slides (in PDF)
... and also abstract (in Word format (.doc))

Closing the Gap between Manufacturing and Design

Wolfgang Fichtner

Silicon Eng./Synopsys

slides (in PDF)

A unified Data Model for EDA tool Integration

Patrick Groeneveld

Magma

slides (in PDF)
... and also abstract (in PDF)

Global Routing: Metrics, Benchmarks, and Tools [?]

Patrick Groeneveld

Eindhoven

and

Patrick Madden, Jurgen Westra

paper (in PDF)

Efficient Debugging of Silicon Prototypes

Yu-Chin Hsu

Novas

slides (in PDF)
... and also paper (in Word format (.doc))

Design and Test of a Mixed-Signal Application-Specific Video Encoder

Haiming Jin

Intel

paper (in PDF)

On Transparency in Design for Manufacturing [Invited]

Andrew Kahng

Blaze/UCSD

slides (in PDF)

Supersize VLSI: A Recipe for Disaster

Patrick Madden

SUNY

paper (in PDF)
... and also slides (in PowerPoint format (.ppt))

RADAR: RET-Awar Detailed Routing

Joydeep Mitra

Magma

slides (in PowerPoint format (.ppt))
... and also paper (in PDF)

Diffusion-based Placement Migration

David Pan

U Texas

slides (in PDF)

Statistically-based design automation for timing and power

Sachin Sapatnekar

U Minn

and

Nagib Hakim @ Intel

slides (in PDF)

Large Scale Circuit Placement: Gap and Progress

Joe Shinnerl

UCLA

slides (in PDF)
... and also paper (in PDF)

Using Yield-Focused Design Methodologies to Speed Time-to-Market

David Thon

Cadence

abstract (in Word format (.doc))

Towards Manufacturability Closure: Process Variations and Layout Design

Andres Torres

Mentor

slides (in PDF)
... and also paper (in PDF)

Design at Large: Emergence of Platform Oriented Design [Keynote]

Gadi Singer

Intel

Open Access Data Model

Eric Leavitt

Cadence

Tool Development Infrastructure for Multi-Million Gate Designs

Igor Markov

U Mich