Electronic Design Process Symposium

Preliminary Program for 2024


Day 1, Thursday 9:00am; Session 1

Welcome Ramond Rodriguez Chair: Ramond Rodriguez

Chandrakant Patel
9:05am

Energy and Thermal Management of Chips, Systems and Datacenters Necessitates a Return to Fundamentals

Chandrakant Patel
HP

The latter part of 20th century witnessed the rise of the compute utility made up of large-scale data centers housing densely packed compute, storage and networking equipment. The cyber age data centers became modern day factories requiring megawatts of power for the information technology (IT) equipment much like the process equipment in a factory of the machine age. Electrical energy supplied to the chips and systems in the data centers turned into multi-megawatts of heat energy which in turn required heat removal means. The active heat removal means also required power. While many innovative measures have been used for heat removal and energy management in data centers, there is a substantial gap in application of fundamentals of engineering when compared to the approaches taken by the contributors of the 19th and early 20th century machine age. As an example, machine age contributors performed exergy (2nd law of thermodynamics) analysis and deemed it necessary to build a hydro-electric plant as part of the design of an Aluminum factory. Indeed, majority of data centers today rely on the power infrastructure built by our predecessors. Given the inexorable trajectory of data centers strongly driven by AI, and associated demands on available energy, it is time we returned to such fundamentals particularly given the environmental challenges.

In my talk, I will present a holistic approach that traces the energy flow from a power plant to a chip, and from the chip core to the cooling tower.


Day 1, Thursday 10:00am; Session 2

Innovative Design Techniques Chris Cheng Chair: Chris Cheng

Gopal Hegde
10:00am

Enabling Effortless Machine Learning for Embedded Edge Applications

Gopal Hegde
SiMa.ai

Machine Learning is a game changing technology of our generation and similar Internet in the 1990s, will impact every aspect of our life. While Machine Learning use cases and applications are well established in the cloud & IoT devices, in the embedded edge market, its usage is in its infancy. We at SiMa.ai are focused on disrupting this market by turbo charging embedded compute with the addition of machine learning. Embedded edge has space and power constraints and has a huge expertise gap relative to cloud computing when it comes to machine learning. The presentation covers market requirements, key challenges and our unique software first approach to machine learning at embedded edge. We will discuss key market segments, their unique requirements and how our silicon and software solutions provide a way for our customers to easily develop and deploy machine learning solutions that address their use cases and applications.

Vishal Khandewal
10:35am

AI: Trailblazing the Next Generation of Semiconductor Innovation

Vishal Khandewal
Synopsys

With AI-based applications coming pervasively mainstream through ChatGPT, digital healthcare, and almost everything else we do with our devices daily, digital chip design is seeing an exponential push towards complexity, performance, power, and time-to market. EDA tool flows are becoming mission critical to meet the demands of a hardware-led 4th industrial revolution that is driving everything towards being intelligent, connected, monitored and data-driven. In this talk we go into the details of how hardware design and EDA tools are evolving to deliver the next generation of performance, power, and productivity (PP&P) boost. Even with exponential growth in design productivity in the past decade, overall design cycle is not meeting its intended targets. The technical complexity of advanced node design with new dominant effects like thermal and IR, are leading to highly complex tool/methodology flows. This is where at Synopsys, we have taken a full tool-stack approach to build pervasive AI into our tools to deliver unprecedented PP&P boost. We will share examples of applications ranging from design implementation, verification, test, and analog/manufacturing to showcase the potential of this technology and how it is reshaping chip design workflows. Many of these technologies are taking us closer to the no-human-in-the-loop goal for chip design. With serious talent shortage and increase in solution complexity beyond human expertise, AI-augmented solutions for chip design are the way forward.

Akhilesh Kumar
11:10am

Harnessing LLMs for Advanced EDA Platforms: Code Generation and Beyond

Akhilesh Kumar
Ansys

Large Language Models (LLMs) such as GPT-4, Gemini, Llama etc., have demonstrated astounding capabilities in a range of tasks such as knowledge extraction, Q&A, summarization, code generation, contextual problem solving etc. The LLMs can also be adapted to specific applications through a variety of methods such as fine tuning, in-context learning, RAG, agent-based systems etc., making them quite versatile.

Modern EDA platforms, such as Ansys SeaScape, have sophisticated workflows, hundreds of user APIs, complex input data requirements, and require deep domain knowledge and expertise for efficiently using the platform. This talk will discuss how LLMs can greatly improve the productivity and user experiences for such EDA platforms. The talk presents an overview of code generation techniques using LLMs and will discuss our experience in developing an LLM-based code generation solution for the Ansys SeaScape platform. Going beyond the code generation, this presentation will discuss creating an LLM agent-based copilot for providing intuitive assistance to the users of the Ansys SeaScape platform for a variety of operational modalities.


Day 1, Thursday 12:45pm; Session 3

Lunch Keynote Ramond Rodriguez Chair: Ramond Rodriguez

Mark Ren
12:45pm

The Application of AI to Chip Design

Mark Ren
NVidia

The applications of AI in chip design undergo an evolutionary path.

Inspired by the success of AlphaGO, Reinforcement Learning techniques were deployed to a number of design problems, achieving results showing the potential of AI.

The advancement of Large Language Models further enabled the application of AI in a much broader set of design activities.

LLM-based copilots can improve design productivity by providing knowledge and coding assistance; agents can provide further assistance in key design tasks such as analysis, debugging, and optimization.

The evolution of AI will continue, and we will discuss critical challenges to realizing its revolutionary potential in the chip design process


Day 1, Thursday 1:35pm; Session 4

Heterogeneous Integration Aparna Dey Chair: Aparna Dey

Sathishkumar Balasubramanian
1:35pm

How AI is changing every aspect of EDA, starting from transistor-level simulation

Sathishkumar Balasubramanian
Siemens

There is a lot of hype in the industry around AI, but behind the hype there is the reality. That reality is that AI really is impacting virtually every aspect of semiconductor design. However, its not as simple as taking general purpose AI solutions and hoping they work for EDA, the risks are too high and when dealing with parts per billion (or trillion) in acceptable errors, hallucinations are not acceptable. What is needed are Verifiable AI solutions that deliver results that users can trust and that reduce the overall resources needed to complete a task. At Siemens EDA we have been able to leverage Verifiable AI to accelerate virtually every aspect of the design and verification process.

In this presentation we will explore the requirements for, and state of the art of, AI in EDA application. We will explore AI's impact on every aspect of design starting from transistor-level simulation.

Sreejit Chakravarty
2:10pm

Test, Repair and Reliability Challenges of Chip-let Interconnects

Sreejit Chakravarty
Ampere Computing

Chip-let based design, fueled by various advanced packaging technologies, is projected to revolutionize the semiconductor industry. This brings along with it associated challenges to achieve adequate yield and aging related reliability issues. This talk will present manufacturing defect profiles associated with advanced packaging; the test and repair requirement, during high volume manufacturing, to achieve adequate yield; and challenges associated with latent defects leading to aging related field failures. RAS solutions required to address such reliability issues are highlighted.

Jianjun Xu
2:45pm

Artificial Intelligence and Machine Learning for RF and Microwave Design

Jianjun Xu
Keysight

This talk reviews some powerful and practical Artificial Intelligence and Machine Learning (AI/ML) technologies for applications in traditional RF and Microwave design and beyond. After a very brief overview of the AI/ML landscape, we focus on Artificial Neural Networks (ANNs) and provide several key examples of modern ANN applications to electronic, electro-thermal, and electro-chemical device modeling, and behavioral modeling to illustrate the substantial benefits and generality of present techniques.

The talk concludes with a discussion of the potential of AI/ML technologies to address and solve future challenging and important RF and Microwave design problems, e.g., for 6G.


Day 1, Thursday 3:30pm; Session 5

Digital Twin and Sustainability Norman Chang Chair: Norman Chang

Ala Moradian
3:30pm

Promises and Challenges of Digital Twin for Semiconductor Manufacturing

Ala Moradian
Applied Materials

The advancement of cutting-edge technologies like Artificial Intelligence (AI), Large Language Models (LLM), and Electric Vehicles (EV) demands sophisticated semiconductor devices with precise specifications.

Concurrently, the emergence of digital twins and AI stands as pivotal in facilitating the development and enablement of such technologies.

This talk delves into the vision and significance of AppliedTwin(tm), a proposed digital twin framework tailored for semiconductor manufacturing.

AppliedTwin delineates various levels of abstractions ranging from digital fabrication facility down to digital twin of individual devices, each characterized by distinct attributes governing their interaction with physical assets, fidelity, etc.

Applied Materials has spearheaded the application of digital twins in semiconductor manufacturing with the introduction of EcoTwin(tm), a platform designed to promote sustainability.

In this talk the critical role of digital twins in propelling innovation and efficiency in semiconductor equipment manufacturing.

Paul Harrison
4:05pm

Making Data Center Digital Twins a Reality

Paul Harrison
Cadence

This talk will discuss the application of Digital Twins to Data Centers.

Historically decisions for data center operations were made based on rules of thumb or the person who would most confidently put across their point of view.

Cabinet power densities continue to rise, accelerated by AI, increasing the need complex technologies like liquid cooling to be more widely implemented. This means data center operations have become more difficult to manage, while the impact of their downtime can be catastrophic for companies. Fortunately, data center operators are starting to adopt CFD-based Digital Twins to help inform their operational decisions, improve their understanding, and reduce the risks. This talk will explain how to create a Data Center Digital Twin, some of the challenges with creating them, how they integrate with data sources and existing processes, and the benefits to operators this technology brings.

Norman Chang
4:40pm

Innovating Semiconductor Manufacturing with ML-augmented Digital Twins

Norman Chang
Electronics, Semiconductor, and Optics BU, Ansys

Developing each processing step in semiconductor manufacturing has heavily relied on in-situ sensors in the equipment and numerous try-outs in recipe generation. However, with advancements in multiphysics simulation technologies, an innovative ML-augmented hybrid simulation methodology has been developed. This methodology combines the strengths of multiphysics simulation and in-situ measurement in building semiconductor processing digital twins. In this talk, we will review the current state-of-the-art digital twin technologies and identify the gaps that need to be addressed to fully utilize digital twins in developing new process recipes in semiconductor manufacturing.


Day 1, Thursday 6:45; Session 6

Dinner Keynote Ramond Rodriguez Chair: Ramond Rodriguez

Pushkar Apte
6:45pm

Semiconductors and Artificial Intelligence:The Virtuous Cycle

Pushkar Apte
SEMI

Artificial Intelligence (AI) has taken the world by storm, and has become a strategic imperative for most industries. While the concept of AI is over half a century old, it has accelerated rapidly just over the past decade, in large part due to amazing advances in semiconductor chips. In turn, AI is driving growth in semiconductor revenues and improvements in operational efficiency, creating a virtuous cycle.

However, there are formidable roadblocks ahead. AI models and datasets are growing at an exponential rate, far outpacing hardware advances – creating both performance and sustainability challenges. System-level innovation is required for continued progress in AI, which requires meaningful collaboration and data-sharing – often difficult in an industry where IP is critical.

This presentation will focus on this virtuous cycle between semiconductors and AI, highlighting the benefits, challenges and solution paths for continued progress.


Day 2, Friday 9:00am; Session 1

Welcome to Day2 Ramond Rodriguez Chair: Ramond Rodriguez

Ronjon Nag
9:05am

Is AI intelligent?

Ronjon Nag
Stanford Medicine

Artificial intelligence is in the news daily, and people ask whether they are truly intelligent.

Maybe it still lacks the depth of human intelligence today, but where is already cleverer, and what stops it from reaching the ultimate pinnacle of ”general intelligence” - could that ever be possible? We will consider the implications of creating truly intelligent machines and the potential consequences for human society.


Day 2, Friday 10:00am; Session 2

Design for Security and AI Gang Qu Chair: Gang Qu

Shiva Kintali
10am

Unmasking the Risks and Biases of LLMs

Shiva Kintali
R3AI

LLMs have emerged as powerful tools, revolutionizing various domains from natural language processing to content generation, but beneath their remarkable capabilities lie intricate challenges and perils that demand our attention.

While they offer convenience and productivity, we dissect how they can also be manipulated and weaponized by malicious actors, raising concerns about inherent biases, jailbreaking potential, security concerns, privacy issues, misinformation, deepfakes, cyber threats and their unsettling societal consequences. We explore how biases present in training data, historical injustices, and societal prejudices can be perpetuated and even amplified by these models, posing a significant threat to fairness, equity, and inclusivity.

This talk is aimed at raising awareness and engage the audience in a critical dialogue on these multifaceted challenges posed by LLMs. By understanding these challenges, we can collectively work towards harnessing the power of these models for the betterment of society while safeguarding against their unintended consequences.

Qian Wang
10am

Advancing Hardware Security in the Post-Quantum Cryptography Landscape: Challenges and Solutions

Qian Wang
U. Cal. Merced

Hardware security in the era of post-quantum cryptography has become increasingly crucial due to the potential threat quantum computers pose to traditional cryptographic algorithms. Post-quantum cryptography aims to develop cryptographic algorithms that are resistant to attacks from quantum computers. However, ensuring the security of these algorithms requires not only advancements in software but also robust hardware security measures. In this talk, we will first discuss the implementation of quantum-resistant cryptographic modules on hardware platforms, necessitating upgrades in both hardware and firmware to accommodate new algorithms efficiently. Moreover, hardware implementations of cryptographic algorithms are vulnerable to side-channel attacks, where an attacker exploits information leaked through physical characteristics such as power consumption or electromagnetic radiation. Post-quantum cryptographic hardware must incorporate countermeasures to mitigate these risks.

Naresh Sehgal
11:10am

Trust Based Modeling for Improved Security

Naresh Sehgal
Deeply Human AI

The present state of Edge Computing is an environment of different computing capabilities connected via various communication paths. Actors on the Edge may interact with each other and a central datacenter. An important part of information security is the evaluation of trust between actors, whether those actors are people or machines. Although many distributed trust models exist, our proposed model introduces three key concepts. The first concept is that trust is not bidirectional between two parties. The second concept is that trust is different between different actors, based upon the nature of their relationships. The third concept is that trust depends on the content of a transaction. We will present some real-life examples to illustrate these concepts.


Day 2, Friday 12:30pm; Session 3

Lunch Keynote Ramond Rodriguez Chair: Ramond Rodriguez

Pradeep Dubey
12:30pm

Scaling to Meet the Needs of AI

Pradeep Dubey
Intel

Artificial intelligence (AI) is impacting not just what computing can do for us, rather how computing gets done. Fast-evolving AI algorithms are driving demand for growing performance at an unprecedented rate and scale. This talk is about some of our research aimed at exploring technological and system-level opportunities for cost-effective scaling of emerging AI datacenters.


Day 2, Friday 1:30pm; Session 4

Emerging Computing Paradigms Randy Fish Chair: Randy Fish

Brandon Wang
1:35pm

Emerging Technologies for Computing Paradigm Shift

Brandon Wang
Synopsys

The explosive growth of AI has triggered a rapid increase in semiconductor demand, leading to soaring power consumption and unsustainable water usage. This presentation will explore emerging technologies essential for driving a paradigm shift towards energy-efficient computing. Topics will include the “Shift Left” design methodology, the impact of SLMs (Small Language Models) on computational efficiency in AI, and the potential of neuromorphic and quantum computing as next-generation architectures. These advancements are poised to enable significant digital transformation and drive pervasive intelligence across various industries. The speaker will also provide insights into how organizations can stay at the cutting edge of these innovations, offering a forward-looking perspective on the future of computational systems and the strategic steps needed to lead in this rapidly evolving landscape.

Ashkan Seyedi
2:10pm

Scaling Out future AI systems

Ashkan Seyedi
NVidia

Without a doubt, optical interconnects play a crucial role in enabling high escape bandwidth density for advanced processors. The insatiable bandwidth demands for next-gen processors is unlike anything for which the industry has had to optimize. In this talk, I will outline some of the problems we are facing and solutions which might intersect our needs.


Day 2, Friday 2:40pm; Session 5

Closing Comments and Feedback Ramond Rodriguez Chair: Ramond Rodriguez

Ramond Rodriguez

Closing

Ramond Rodriguez
Intel

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