Our Cast
Stelios Diamantidis
Cognichip
A pioneer in semiconductor innovation, Stelios Diamantidis brings over 25 years of expertise in chip design, EDA, and artificial intelligence. As a founding executive at Cognichip, he is driving the next frontier of chip design: Artificial Chip Intelligence™ ACI—powered by the world's first purpose-built, physics-informed foundation model for semiconductors.
Previously, Stelios was Distinguished Architect and Executive Director of Synopsys' Generative AI Center of Excellence, where he launched DSO.ai™—the world's first AI application for chip design—in 2020. Under his leadership, Synopsys pioneered GenAI for enterprise productivity and introduced market-defining products like Synopsys.ai™ Copilot.
A Stanford electrical engineering graduate and an IEEE member with numerous patents and publications, Stelios has founded two successful ventures and developed technologies that reshaped industry landscapes. He continues to drive strategic innovation, solving complex hardware challenges with transformative AI solutions.
Jean-Philippe Fricker
Cerebras
Jean-Philippe (J.P.) is Chief System Architect at Cerebras Systems. Before co-founding Cerebras, J.P. was Senior Hardware Architect at rack-scale flash array startup DSSD (acquired by EMC). Prior to DSSD, J.P. was Lead System Architect at SeaMicro where he designed three generations of fabric-based computer systems. Earlier in his career, J.P. was Director of Hardware Engineering at Alcatel-Lucent and Director of Hardware Engineering at Riverstone Networks. He holds an MS in Electrical Engineering from Ecole Polytechnique Fédérale de Lausanne, Switzerland, and has authored 42 patents.
Chia-Tung Ho
Nvidia Research
Chia-Tung has several years of industrial EDA experience under his belt. Before coming to US, he worked for IDM and EDA companies in Taiwan, developing in-house design for manufacturing (DFM) flow at Macronix, and fastSPICE at Mentor Graphics and Synopsys. During his PhD study, he worked with the Design Technology Co-Optimization (DTCO) team in Synopsys as a technical intern from 2019 to 2021, also as an AI resident in X, the Google moonshot factory. In Nvidia, he works as senior research scientist on ML/AI for VLSI, Agentic AI for chip design, custom circuit design, and standard cell layout synthesis.
Nilesh Kamdar
Keysight
ilesh Kamdar is the General Manager of the Design & Verification Business Unit at Keysight EDA. This includes overseeing various portfolios like RF/Microwave, High Speed Digital, Device Modeling, Systems, and other EDA businesses at Keysight.
Nilesh was the Portfolio Manager in the EDA group overseeing strategy and R&D product development. Before this, he led the Software Business & Operations team at Keysight and focused on software business model transformation and license entitlement technologies for the company. Nilesh joined Hewlett-Packard in 1999 as a post-sales technical support engineer in the EEsof EDA division. Over his 25+ year career, he worked in various leadership roles including leading the Learning Products team, Circuit Simulation and Architecture team, Application Engineering team and Customer Success team. Nilesh believes in partnerships and collaboration to provide compelling value to customers and ensuring customer success. Over his career, Nilesh has a strong track record of providing such value either through breakthrough simulation products, application content, or training. Nilesh holds a Master's in Electrical Engineering from Utah State University and a Bachelor's in Electronics Engineering from Mumbai University, India. He is based in Santa Clara, California.
Matt Maidment
Ampere
Matt Maidment is Senior Director of Front End Design Automation at Ampere. Matt and his team are responsible for Ampere's RTL design and verification EDA tools, custom workflows and DevOps. Over his nearly 30 year career Matt has worked closely with RTL design and verification teams as well as the EDA industry to enhance automation and methods for RTL modeling, compilation, advanced simulation semantics and enhanced performance, static checks, debug, CI/CD and implementation handoff. Matt was actively involved with SystemVerilog standardization for 18 years, serving as technical chair for the sub-committee overseeing the design and verification features for multiple revisions of the standard.
Vik Malyala
Supermicro
Vik Malyala is Chief Business Officer at Supermicro, where he leads business development and strategic partnerships with major technology companies worldwide. Since joining the company in 2009, Vik has played a central role in shaping the company's global strategy, growth and innovation, previously serving as senior vice president of technology and AI and president and managing director of EMEA.
Xiaoning Qi
Alibaba
Xiaoning Qi is the Vice President of Alibaba Group. Previously, he held senior management and technical positions in companies such as Intel, designing integrated circuits and systems. He sits on the board of directors at several international organizations including RISC-V International Association. He is a member of Advisory Board, Global Semiconductor Alliance (GSA), and a member of CEO Council GSA. He has published more than fifty technical papers, a book, and has delivered over four dozen invited talks. He holds two US patents. Xiaoning received his Ph.D. degree in Electrical Engineering from Stanford University and is an IEEE Fellow.
Fred Roby
Amazon
Fredrick Roby is a technology executive and serial innovator with 25+ years of building products and platforms that move industries forward. Across e-commerce, social media, direct marketing, entertainment, and cloud computing, he has consistently been the architect behind the technology that didn't exist yet, then made it work at scale.
At Amazon Web Services, Fredrick leads the Solutions Architecture team for the Hi-Tech, Electronics & Semiconductor industries, partnering with global enterprises to accelerate AI, GenAI, HPC, and cloud transformation. Under his leadership, the segment has delivered 44%+ year-over-year growth, with Fredrick directly influencing hundreds of millions in cloud revenue through strategic advisory at the C-suite and board level.
His innovation track record spans decades and industries, and from startups to global brands. At Myspace, Fredrick designed a multi-dimensional content relevance algorithm, factoring recency, engagement, content taxonomy, and user affinity, that served more than 2 million unique users daily and drove an 80%+ increase in content engagement within two months of launch. That work became the basis for a granted U.S. patent (US 20120110080). At Outlook Amusements, he invented a new virtual consultation model that allowed independent contractors to offer their services online and connect with clients via a single-click phone interaction through web and mobile, also earning a U.S. patent (US 20160063448). Earlier in his career, he contributed to the first online golf club marketplace, where real transaction data established a live market price for used clubs, an early proof of concept for data-driven commerce. As CTO of Dollar Shave Club during its early growth phase, Fredrick helped build the technical foundation that supported the company's successful $9.8M Series A raise. As co-founder and CEO of Vyoo, a community and social app, Fred led the development team in building a platform that became the official hub for Holliblu, a private nurses community, and contributed to its acquisition by Nurse.com. At WarnerMedia, Fred led B2B technology teams of more than 100 professionals, including product managers and web and mobile app developers. As the pandemic disrupted the entertainment industry, Fredrick identified the gap before the market did. He spearheaded the design and launch of an internal virtual premiere platform that combined live streaming, on-demand content, and online audience engagement, reducing per-event costs by 80% and giving the studio a first-mover advantage at a moment when every competitor was scrambling for a solution. He also led a strategic consolidation of a 60+ application portfolio, eliminating a third of the apps and saving more than $3.5M in the first year alone.
A sought-after voice on the intersection of AI and industry, Fredrick has participated as a panelist at major conferences, corporate events and university events throughout his career. He was a featured panelist on the ”AI in Digital Implementation” panel at the Design Automation Conference (DAC), hosted by Siemens, one of the semiconductor industry's most prestigious technical forums. He has also spoken at corporate innovation summits and student-facing campus events, bringing a practitioner's perspective on AI adoption, career development in tech, and what the next generation of engineers needs to know about building at scale.
Fredrick holds an MBA from UCLA Anderson, a BS in Computer Engineering from Cornell University, and a BS in Physics from Lincoln University. He is an active contributor to two executive communities, the AWS & Deloitte Semiconductor CIO community and the AWS EDA User Group, and has spoken on diversity in tech at the Nextplay Tech Spotlight conference.
Naresh Sehgal
Secure the Cloud
Naresh K. Sehgal most recently worked at NovaSignal Corp for 3 years as the Sr. VP of Cloud Engineering and CISO (Chief Information Security Officer). Before that he was at Intel for more than 31 years in various engineering and management roles. Naresh has earned a B.E. (Electrical Engineering) from Punjab Engineering College, M.S. and Ph.D. from Syracuse University in Computer Engineering. Naresh has taught Cloud Computing at Santa Clara University, where he also earned a MBA. He has co-authored 10 books and over 100 papers.
Henry Sheng
Synopsys
Henry Sheng is Executive Director of R&D Engineering at Synopsys, where he leads development of EDA technologies for 3DIC, chiplet, and multi-die systems. He has played a foundational role in the creation of Synopsys' multi-die design and implementation platform, including advancements in system planning, implementation, signoff analysis integration, and AI-driven design optimization. Prior to his current role, he led physical implementation R&D and advanced-node foundry enablement from 20nm through 3nm. Henry received his B.S. and Ph.D. in Electrical Engineering and Computer Sciences from the University of California, Berkeley.
Hamid Shojaei
Cadence
Hamid Shojaei is a Distinguished Engineer at Cadence and the former CTO and Co Founder of ChipStack, which was acquired by Cadence, where he sets the technical vision and leads development of the company's LLM-powered verification platform. Hamid heads a seasoned team of engineers, turning breakthrough research into practical tools that redefine how semiconductors are designed and verified. Drawing on over 15 years' experience at Qualcomm, Google, and photonics start-up Lightmatter, he has steered teams through multiple generations of TPU and AI-centric chip projects, earning an ACM Best Paper Award along the way. Hamid holds a PhD in Computer Engineering from the University of Wisconsin, Madison, and is recognized for bridging design verification, machine learning, and cutting-edge hardware architecture.
Farhang Yazdani
BroadPak
Farhang Yazdani is a semiconductor executive, inventor, investor, author, and technology strategist with more than two decades of experience. He has played a pivotal role in advancing next-generation semiconductor packaging technologies, heterogeneous integration, chiplet architectures, silicon photonics, and co-packaged optics. Farhang is the CEO of BroadPak Corporation and inventor of the groundbreaking 3DHI HiRise Packaging Technology. He holds 40+ issued and pending patents and is the author of “Foundations of Heterogeneous Integration: An Industry-Based 2.5D/3D Pathfinding and Co-Design Approach”, a widely respected reference book on advanced semiconductor integration and system-level co-design methodologies. Farhang serves as the Co-Chair of the IMAPS Silicon Valley Chapter and contributes actively to industry roadmaps, technical committees, and professional development initiatives. He also serves on the Board of Directors and Advisory Boards of several technology companies. He is the recipient of the NIPSIA Award for his significant contributions to semiconductor packaging innovation and technology advancement. Farhang received his undergraduate and graduate degrees in Chemical Engineering and Mechanical Engineering from the University of Washington, Seattle. He collaborates with industry leaders, research institutions, and technology innovators worldwide to advance heterogeneous integration technologies and help shape the future of AI-driven computing systems.