Talks with Archived Presentations
Some Implications Brought In By The Coming Semiconductor Technologies [Keynote]
Antun Domic
Synopsys
slides (in PDF)
Compositional Synthesis for High-Level Design of System-Chips
Rajesh Gupta
UCSD
slides (in PDF)
Big Data and Machine Learning for Chip Design
John Lee
Ansys
slides (in PDF)
SiP Technology Direction and Design Challenges
Dr. CP Hung
ASE Group Taiwan
slides (in PDF)
System Level Design and Simulation for Heterogeneous Integration
Bill Bottoms
Third Millennium Test Solutions
slides (in PDF)
The Continuing Growth of Silicon Integration Technologies and Application: System Level Testing Prompts a Reflection on the EDA to HVM Highway
Zoe Conroy
Cisco
slides (in PDF)
Expanding Die Yield analysis to include IC Package Impact [UNREADABLE PDF]
Keith Arnold
PDF Solutions
slides (in PDF)
High Volume Manufacturing Supply Chain Ecosystem for 2.5D HBM2 ASIC SiPs
Asim Salim
Open Silicon
slides (in PDF)
Design to Manufacturing Considerations in 3D IC Design
Juan Rey
Mentor
slides (in PDF)
System-Wide Visibility in Post-Silicon
to Drive Meaningful Analytics
Gajinder Panesar
UltraSoC
slides (in PDF)
Validation Analytics - Data You Need at the Speed You Need It
Cynthia M. Cook
Intel
slides (in PDF)
IEEE CEDA System Validation & Debug Technology Committee: Validation Coverage Working Group Update
Al Czamara
Test Evolution
slides (in PDF)
Security vs. Debug - Challenges vs. Opportunities [UNREADABLE PDF]
Vikas Kumar
Intel
slides (in PDF)
The Fourth Industrial Revolution: The Cognitive ERA [Keynote]
Jim Hogan
Vista Ventures
slides (in PDF)
Data Centric Computer Architecture [Keynote]
Pankaj Mehra
AwarenaaS
slides (in PDF)
Machine Learning - Design, Development and Augmented Intelligence
David White
Cadence
slides (in PDF)
Machine Learning in ARM Processor Design [UNREADABLE PDF]
Rob Aitken
ARM
slides (in PDF)
Solido: Machine Learning for Engineering
Jeff Dyck
Solido Design Automation
slides (in PDF)
Validation, Testing and Tuning of Mixed-signal/RF Circuits and Systems: A Machine Learning Assisted Approach
Abhijit Chatterjee
Georgia Tech
slides (in PDF)
Talks Delivered, but without Archived Presentations
SEMI Welcoming Remarks
Dave Anderson
SEMI Americas
2017 EDPS Program Committee
General Chair: Shishpal Rawat @ CEDA
- Aparna Dey @ Cadence
- Naresh Sehgal @ Intel
- John Swan @ Intel
- Peter Ateshian @ Naval Postgraduate School (NPS)
- Herb Reiter @ EDA 2 ASIC
- Dwight Hill @ Synopsys
- Camille Kokozaki @ NetApp
- Steve Grout @ Consultant
