Electronic Design Process Symposium

Status and Evolution of IP Symphony

David Dick

Fujitsu

slides (in PowerPoint format (.ppt))

Fast Integration of EDA Tools and Scripting Language

Pinhong Chen

UC Berkeley / TSMC North America

and

Kurt Keutzer @UC Berkeley

paper (in PDF)

The UEDK: A VLSI CAD/EDA Learning-by-Example Platform

Jose Lima

U. do Minho in Portugal

paper (in PDF)

Key Performance Indicators of Methodology Capability

Ron Collett

Numetrics

slides (in PowerPoint format (.ppt))

On High Level Estimators and Constructors

Majid Sarrafzadeh

UCLA

and

Jason Cong

paper (in Word format (.doc))
... and also slides (in PowerPoint format (.ppt))

A METRICS System for Design Process Optimization

Andrew B. Kahng

UCSD

and

Stefanus Mantik @UCLA / Cadence

paper (in PDF)
... and also slides (in PowerPoint format (.ppt))

Tool Benchmarking: Status and Directions

Justin Harlow

SRC

slides (in PowerPoint format (.ppt))

A Eulogy for Wireload Models

Bill Bell

TI

slides (in PDF)

Optimizing Cycle Time Through the Use of Metrics

Bill Bell

TI

slides (in PDF)

Datamodels for Physical Synthesis: Some Practical Considerations for Library Support

Dwight Hill

Synopsys

and

Shir-Shen Chang @Synopsys

slides (in PowerPoint format (.ppt))
... and also paper (in PDF)

Design Planning Methodology for Rapid Chip Deployment

David E. Lackey

IBM Microelectronics

paper (in PDF)

Open Design Rule Markup Language for STARC Open Design Rule Initiative

Takahide Inoue

UC Berkeley /JSIG VSIA

and

Hiroyuki Hara @STARC, Tadahiko Nakamura @STARC

paper (in PDF)
... and also contribution (in PDF)

Design Processes Roadmap in the 2001 ITRS: Current Draft and Open Issues [Dinner Talk]

Don Cottrell

SI2

slides (in PowerPoint format (.ppt))

Semicustom Design: Synergies Between Full Custom and ASIC Design Flows in High-Performance Processor Design

Greg Northrop

IBM

paper (in PDF)
... and also slides (in PowerPoint format (.ppt))

RTL-Down Data Models and Convergence Methodology

Patrick Groeneveld

Magma

slides (in PowerPoint format (.ppt))

Data Modeling and Convergence Methodology in Integration Ensemble

Lou Scheffer

Cadence

paper (in PDF)

The IC Implementation Tool Set

Gary Smith

Dataquest

slides (in PowerPoint format (.ppt))

SOC Verification Software - Test Operating System

Robert Devins

IBM

paper (in PDF)

Power and Performance Optimization of Cell-Based Designs with Intelligent Transistor Sizing and Cell Creation [?]

Etsuji Yoneno

Hitachi

and

Philippe Hurat @ Cadabra

paper (in PDF)

Using Esterel Approach to Design Complex Systems

Gilles Pelissier

STMicroelectronics

and

Lionel Blanc @Esterel Technologies

paper (in Word format (.doc))

A Formal Top-Down Design Process of Analog Mixed-Signal Circuits

Ken Kundert

Cadence

paper (in PDF)

Changing Paradigms - Fast-Turn Mixed Signal RF IP

James Spoto

Enablix Solutions

paper (in PDF)
... and also slides (in PowerPoint format (.ppt))

On-Chip Resource Allocation Algorithm for Reconfigurable Computing Machines [?]

Kagan Agun

IIT

and

Morris Chang @ IIT

contribution (in PDF)

Current Analog Design Methodologies and Practices

Bull Guthrie

Numetrics

slides (in PowerPoint format (.ppt))

Trends in AMS Design Methodology

Gary Smith

Dataquest

slides (in PowerPoint format (.ppt))

General Issues in ASIC Design: Business and Methodology

George Doerre

IBM

High-Level Design Modeling and Design Handoff

Rajesh Gupta

UC Irvine

Optimizing Cycle Time Through the Use of Design Metrics

Bill Bell

TI